The quality of chips is mainly determined by three factors: market, performance and reliability.
First, in the early stages of chip development, it is necessary to conduct a thorough market study to define specs that meet customer needs;
The second problem is performance. IC design engineers design circuits that require Desine simulation, DFT circuit validation, laboratory sample evaluation, and FT to determine performance to meet the requirements of earlier definitions;
Finally, reliability. In order to assess chip life and possible quality risks, it is necessary to conduct a series of stress tests to ensure that customers perform well when they first obtain samples.
The life of the chip is divided into three phases based on the bathtub curve. The first stage is the initial failure: the failure rate is high, caused by manufacturing, design and other reasons. The second stage is failure: the failure rate generated by the equipment failure mechanism is very low. The third stage: break through the fault, high fault efficiency. For new product reliability, reliability in wafer, packaging, packaging and batch production phases is usually controlled by the corresponding fabs/seal pilot plants and is not much different from older products. The durability of the chip to temperature and humidity during packaging, transportation and welding is limited to unsealed packaging (plastic seal). Before the packaging reliability test, the influence of internal water vapor on the internal circuit during welding is simulated, and the influence of high temperature and time on the equipment under the long-term storage conditions of the chip. For plastic seals only, there are hast and unbiased UHAST tests, and THE Uhast needs to be processed in advance by PC.
TC also needs PC processing in advance to detect whether the chip will fail due to thermal fatigue. The mechanical stress bearing capacity may cause permanent changes in the electrical or physical characteristics of the chip under alternating high and low temperature. HTSL does not need the influence of high temperature and time of PC pretreatment on the device under long-term storage conditions. Accelerated life simulation test - mainly tests the electrical reliability of products. It is mainly used to evaluate chip life and circuit reliability, and can be tested in two ways: DFT test mode and EVA board test mode.
Early life failure, large sample size.
The non-volatile memory durability test only needs to verify the chip containing this performance. It takes at least two months to complete a batch of reliability tests, and manufacturers need at least three batches of reliability tests to complete the product reliability verification. In addition, many reliability testing projects require testing in third party laboratories, test boards, test seats and test costs are not small. As a result, reliability testing can be described as a time-consuming and costly large project. However, as it tests more items, it covers a wider range of areas to ensure that customers are using chips that are reliable enough. Therefore, reliability testing is also an integral part of the chip life cycle.